Synchronous clock, also known as smart radio clock, is the synchronous clock used in the construction of standardized examination halls in the national education reform. Synchronous clocks are also known as "clock alignment". The most intuitive way to align (synchronize) clocks distributed across different regions is to move the clock, which can be done using a standard clock, so that all clocks in different regions are aligned with the standard clock. Alternatively, the clock can be first aligned with the system's standard clock, and then compared with other clocks in the system to achieve synchronization between other clocks in the system and the system's unified standard clock. The synchronization of clocks in a system does not require that each clock be completely aligned with a unified standard clock. It is only required to know the clock deviation between each clock and the system standard clock at the comparison time and its drift correction parameters relative to the standard clock after comparison, without the need to dial the clock. Skipping or leap second processing is only performed when the accumulated clock difference of the clock is significant. Because we need to compare the two clocks at the same time Clock face time alignment requires a precise phase microstep regulator to adjust the phase of the clock's dynamic source. In addition, the drift patterns of various driving sources are also different. Even if the clock is completely aligned at two comparison times, there will be errors after comparison. It is still necessary to observe the drift patterns of the compared clock driving source relative to the standard clock, so this is generally not done. Synchronous clocks use low phase noise phase-locked loop technology and large-scale integration Circuit design, built-in high stability constant temperature crystal oscillator OCXO and high-quality, high-precision timing type GPS receiver, using advanced GPS frequency measurement and control technology to accurately measure and adjust the output frequency of the crystal oscillator, ensuring that its output frequency is accurately synchronized with the GPS system, providing high-precision time and frequency reference signals. It can output a level 1 reference clock source that meets the requirements of ITU-T G.811, and can be used in digital switches On SONET and SDH transmission systems. At the same time, it can also provide a level 1 clock synchronization signal for any level of timing signal generator (TSG), and can provide 2.048Mb/s (E1) and 2.048MHz output signals for tracking and UTC time externally. The Opt-EIO option of the synchronous clock can provide a retiming function, which can receive E1 signals and use its precise time reference signal to decode them again. The output waveform conforms to the ITU-T G.703 code type HDB3 E1 signal. When the device itself degrades or loses power, it will activate the direct mode to output the received E1 signal. The 1pps signal output by the synchronous clock is obtained by dividing the frequency signal of the GPS tamed crystal oscillator by 10000000 times. The phase is strictly consistent with the carrier signal and is not affected by the short time random jump of GPS second pulses, which is equivalent to the "reproduction" of the UTC time benchmark. This characteristic is particularly suitable for systems such as communication base stations that require strict time and frequency requirements